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MAX16050 Evaluation Kit
Sequence Delay Control
Capacitors C10 or C20 set the t DELAY periods for U1
and U2 to 644μs, respectively. Replace the capacitors
with different values to adjust the t DELAY periods, or
remove the capacitors to set the t DELAY periods to
34μs. Use the following equation to calculate a new
capacitor value when adjusting the t DELAY period:
The EV kit RESET signals assert low under the following
conditions:
1) Any monitored voltage falls below its input threshold.
2) EN falls below the enable threshold.
3) FAULT output is pulled low.
4) SHDN is pulled low (note that when SHDN is pulled
C =
t DELAY ? 34μs
5 × 10 5 Ω
low, the controller initiates a reverse-sequence
power-down).
where C is the capacitance of C10 or C20 in farads,
and t DELAY is in seconds.
Table 10. SW2 Channel Bypass
t TIMEOUT ? 34 μs
Reset Timeout Control
Capacitors C11 and C21 set the t TIMEOUT period for U1
and U2 to 1.1ms, respectively. Replace the capacitors
with a different value to adjust the t TIMEOUT periods, or
remove the capacitors to set the t TIMEOUT period to
34 μs. Use the following equation to calculate new
capacitor values when adjusting the t TIMEOUT period:
C =
5 x 10 5 Ω
where C is the capacitance of C11 or C21 in farads,
and t TIMEOUT is in seconds.
Channel Bypassing (SW2)
DIP switch SW2 allows the MAX16050 EV kit to bypass
SWITCH
1
2
3
4
5
6
7
8
9
10
BYPASS CHANNEL
U1_IN4
U1_IN3
U1_IN2
U1_IN1
U2_IN5
U2_IN4
U2_IN3
U2_IN2
U2_IN1
Not used
any unused channels and to power up successfully when
using fewer than four or five DC-DC converters with the
Table 11. Input Overvoltage Thresholds
U1_IN1–U1_IN4 and U2_IN1–U2_IN5 inputs, respectively.
To bypass a channel, remove the shunts connected
across pins 1-2 and 2-3 of headers J1 or J2, and set the
respective SW2 switch to the on position. See Table 10
for the input channel assignment on switch SW2.
Logic Outputs ( OV_OUT , RESET )
The MAX16050 EV kit features test points U1_ OV_OUT ,
U2_ OV_OUT , U1_ RESET , and U2_ RESET to monitor
fault conditions on each controller. U1_ OV_OUT and
U2_ OV_OUT assert low when any of the monitored IN
voltages rise above their overvoltage threshold. See
Table 11 for the input channel overvoltage thresholds.
INPUT CHANNEL
_IN1
_IN2
_IN3
_IN4
IN5 (MAX16051 only)
INPUT OVERVOLTAGE
THRESHOLD (V)
3.43
2.61
1.89
1.55
1.23
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